1. Field of the Invention
The invention relates to integrated circuits. In many cases, and especially for complex integrated circuits, there needs to be one or more pins available that can be used for the definition, from the exterior, of a determined mode of operation of the circuit from among several possible modes. This is the case for microprocessors, memories and many other circuits corresponding to a variety of applications.
For example, it is desired to place the circuit either in test mode or in normal operation mode. Or, again, it is desired that the user should have several possible operating options, from among which he will choose one be means of a pin reserved for this purpose.
2. Description of the Prior Art
The standard approach is to apply a logic level 0 to 1 from the exterior to the pin, as a function of the chosen mode. A detector internal to the integrated circuit examines the state of the pin and gives the rest of the circuit an appropriate command that makes the circuit work in either one mode or another as a function of a logic level detected.
If the number of possible modes of operation is greater than 2, more than one pin is needed to define the desired mode.
This is the simplest approach. An approach that is more economical in terms of numbers of pins has been devised. It consists in providing for a detector capable of recognizing three possible states of the pin: logic state 0 or logic state 1, or high impedance state (pin unconnected or connected to a very high impedance). Thus, each pin enables the definition, from the exterior, of three possible modes of operation.
For a desired number of modes, the total number of pins of the integrated circuit is thus reduced. This is very important since the price of the integrated circuit is greatly affected by the price of the package, and the price of the package depends greatly on the number of pins. We may cite, for example, the case of a 20-pin circuit in which an additional pin would make it necessary, in fact, to change to a 24-pin circuit for there is no standard package available between a 20-pin package and a 24-pin package.
However, existing detectors used to detect either a logic level 0 or a logic level 1 or, again, a high impedance state, have the drawback of consuming a large amount of current not only during the detection but also in permanent operation mode.